View HD74HCT374FPEL_4491898.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HD74HCT374, HD74HCT534
Octal D-type Flip-Flops (with 3-state outputs) Octal D-type Flip-Flops (with inverted 3-state outputs)
REJ03D0667-0200 (Previous ADE-205-556) Rev.2.00 Mar 30, 2006
Description
These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
Features
* * * * * * * LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HCT374P HD74HCT374FPEL HD74HCT534FPEL HD74HCT374RPEL HD74HCT534RPEL HD74HCT374TELL Package Type DILP-20 pin SOP-20 pin (JEITA) SOP-20 pin (JEDEC) TSSOP-20 pin Package Code (Previous Code) PRDP0020AC-B (DP-20NEV) PRSP0020DD-B (FP-20DAV) PRSP0020DC-A (FP-20DBV) Package Abbreviation P FP RP Taping Abbreviation (Quantity) -- EL (2,000 pcs/reel) EL (1,000 pcs/reel) ELL (2,000 pcs/reel)
PTSP0020JB-A T (TTP-20DAV) Note: Please consult the sales office for the above package availability.
Function Table
Output Control Clock D L H L L L L X H X X Notes: 1. H; High level, L; Low level, X; Irrelevant, Z; High impedance HD74HCT374 Q H L No change Z HD74HCT534 Q L H No change Z
Rev.2.00 Mar 30, 2006 page 1 of 7
HD74HCT374, HD74HCT534
Pin Arrangement
HD74HCT374
Output Control 1 1Q 1D 2D 2Q 3Q 3D 4D 4Q 2 3 4 5 6 7 8 9
20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock (Top view)
GND 10
HD74HCT534
Output Control 1 1Q 1D 2D 2Q 3Q 3D 4D 4Q 2 3 4 5 6 7 8 9
20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock (Top view)
GND 10
Rev.2.00 Mar 30, 2006 page 2 of 7
HD74HCT374, HD74HCT534
Logic Diagram
HD74HCT374
1D DQ CQ Clock 2D DQ CQ 3D DQ CQ 4D DQ CQ 5D DQ CQ 6D DQ CQ 7D DQ CQ 8D DQ CQ
Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
HD74HCT534
1D DQ CQ Clock 2D DQ CQ 3D DQ CQ 4D DQ CQ 5D DQ CQ 6D DQ CQ 7D DQ CQ 8D DQ CQ
Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 35 75 500 -65 to +150 Unit V V mA mA mA mW
C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Symbol Ratings Supply voltage VCC 4.5 to 5.5 Input / Output voltage VIN, VOUT 0 to VCC Operating temperature Ta -40 to 85 Input rise / fall time*1 tr, tf 0 to 500 Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Unit V V Conditions
C
ns VCC = 4.5 V
Rev.2.00 Mar 30, 2006 page 3 of 7
HD74HCT374, HD74HCT534
Electrical Characteristics
Item Input voltage Output voltage Symbol VCC (V) VIH VIL VOH VOL Off-state output current Input current Quiescent current IOZ Iin ICC Ta = 25C Min Typ Max 4.5 to 5.5 2.0 -- -- 4.5 to 5.5 -- -- 0.8 4.5 4.4 -- -- 4.5 4.18 -- -- 4.5 -- -- 0.1 4.5 -- -- 0.26 5.5 -- -- 0.5 5.5 5.5 -- -- -- -- 0.1 4.0 Ta = -40 to+85C Min Max 2.0 -- -- 0.8 4.4 -- 4.13 -- -- 0.1 -- 0.33 -- 5.0 -- -- 1.0 40 Unit V V V V A A A Test Conditions
Vin = VIH or VIL IOH = -20 A IOH = -6 mA Vin = VIH or VIL IOL = 20 A IOL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 A
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Maximum clock frequency Propagation delay time Output enable time Output disable time Setup time Hold time Pulse width Output rise/fall time Input capacitance Symbol VCC (V) fmax tPLH tPHL tZL tZH tLZ tHZ tsu th tw tTLH tTHL Cin 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 -- Ta = 25C Min -- -- -- -- -- -- -- 20 5 16 -- -- Typ -- 12 15 16 15 13 16 2 0 5 4 5 Max 30 28 28 30 30 30 30 -- -- -- 12 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- 25 6 20 -- -- Max 24 35 35 38 38 38 38 -- -- -- 15 10 Unit MHz ns ns ns ns ns ns ns pF Data to clock Clock to data Clock, output control Test Conditions
Test Circuit
VCC VCC Output
See Function Table
Input Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
OC
1Q to 8Q or 1Q to 8Q
1 k CL = 50 pF
S1
OPEN GND VCC
1D to 8D TEST tPLH / tPHL tZH / tHZ tZL / tLZ S1 OPEN GND VCC
Clock
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 4 of 7
HD74HCT374, HD74HCT534
Waveforms
* Waveform -1
tr 90 % 90 % 1.3 V 10 % tr Input D 90 % 10 % tPLH Output Q 1.3 V Output Q 1.3 V VOL 10 % tf 90 % 10 % tPHL tf VCC 1.3 V 0V VCC
Input CLK
0V VOH
* Waveform -2
Input CLK 10 %
tr 90 % 90 % 1.3 V 1.3 V tw tsu th
tf VCC 1.3 V 10 % tw 0V VCC
Input D
1.3 V
1.3 V 0V
* Waveform -3
tf 90 % 1.3 V 10 % tZL
tr 90 % 1.3 V 10 % tLZ 1.3 V tZH tHZ 1.3 V 90 % VCC 0V VOH
Input OC
Waveform - A
10 % VOL VOH VOL
Waveform - B
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns 2. Waveform- A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform- B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 5 of 7
HD74HCT374, HD74HCT534
Package Dimensions
JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g
D
20
11
1 0.89 b3
10
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 24.50 25.40 6.30 7.00 5.08
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.27 2.54
JEITA Package Code P-SOP20-7.5x12.8-1.27
RENESAS Code PRSP0020DC-A
Previous Code FP-20DBV
MASS[Typ.] 0.52g
*1
D
F 11
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
Reference Dimension in Millimeters Symbol
10 bp x M L1
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.80 13.2 7.50
0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0 8 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45
Rev.2.00 Mar 30, 2006 page 6 of 7
A
HD74HCT374, HD74HCT534
JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B Previous Code FP-20DAV MASS[Typ.] 0.31g
*1
D 11
F
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
10 bp x M L1
c
Reference Dimension in Millimeters Symbol
y
A1
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.60 13.0 5.50
0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
JEITA Package Code P-TSSOP20-4.4x6.5-0.65
RENESAS Code PTSP0020JB-A
Previous Code TTP-20DAV
MASS[Typ.] 0.07g
*1
D F 11
A
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
*2
E
Index mark
Terminal cross section ( Ni/Pd/Au plating )
Reference Dimension in Millimeters Symbol
c
1 Z e
*3
10 bp L1 x M
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 6.50 6.80 4.40
0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0 8 6.20 6.40 6.60 0.65 0.13 0.10 0.65 0.4 0.5 0.6 1.0
Rev.2.00 Mar 30, 2006 page 7 of 7
A
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
http://www.renesas.com
Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510
(c) 2006. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .6.0

▲Up To Search▲

Price & Availability of HD74HCT374FPEL

	To Download HD74HCT374FPEL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .